发明名称 |
Method and structure for buried circuits and devices |
摘要 |
A method is provided in which for fabricating a complementary metal oxide semiconductor (CMOS) circuit on a semiconductor-on-insulator (SOI) substrate. A plurality of field effect transistors (FETs) are formed, each having a channel region disposed in a common device layer within a single-crystal semiconductor layer of an SOI substrate. A gate of the first FET overlies an upper surface of the common device layer, and a gate of the second FET underlies a lower surface of the common device layer remote from the upper surface. The first and second FETs share a common diffusion region disposed in the common device layer and are conductively interconnected by the common diffusion region. The common diffusion region is operable as at least one of a source region or a drain region of the first FET and is simultaneously operable as at least one of a source region or a drain region of the second FET.
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申请公布号 |
US7491588(B2) |
申请公布日期 |
2009.02.17 |
申请号 |
US20060598507 |
申请日期 |
2006.11.13 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CAMPBELL JOHN E.;DEVINE WILLIAM T.;SRIKRISHNAN KRIS V. |
分类号 |
H01L21/00;H01L21/02;H01L21/3205;H01L21/336;H01L21/76;H01L21/762;H01L21/8234;H01L21/8238;H01L21/8242;H01L21/84;H01L23/52;H01L27/06;H01L27/08;H01L27/088;H01L27/092;H01L27/108;H01L27/118;H01L27/12;H01L29/786 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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