摘要 |
In an LSI system, a short optical pulse train is guided to an optical divider which divides the short optical pulse train into first and second short optical pulse trains. A retardation of ½ of the pulse period is produced between the first and second short optical pulse trains. The first and second short optical pulse trains are guided to first and second photodiodes on an LSI chip and are converted in the first and second electric current pulse trains, respectively. The first and second electric current pulse trains are supplied to an electrical clock output terminal electrically connected to the first and second photodiodes so that the electrical clock output terminals generates an electric clock pulse.
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