PHASE CHANGE MEMORY DEVICE

摘要

A phase change memory device is provided to drive stably and efficiently a row data buffer when a data page size of a sense amplifier is smaller than the row data buffer. A plurality of banks(10_0-10_3) includes phase change resistance cells. A plurality of column switches(CSW) are connected to a plurality of bit lines in order to be controlled by a plurality of column selection signals(CS1-CSm). A sense amplifier(S/A) senses and amplifies data applied from the banks. A bank selection unit(20) outputs selectively the data applied from the sense amplifier according to the bank addresses. A column selection unit(30_0-30_3) outputs selectively the data applied from the bank selection unit. A row data buffer(RDB0-RDB3) buffers the data applied from the column selection unit.