发明名称 BUFFER CIRCUIT, AMPLIFIER CIRCUIT, AND TEST APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To accomplish a buffer circuit which accurately controls a signal level of an output signal according to a clamp voltage to be set. <P>SOLUTION: The buffer circuit is provided which outputs a signal according to an input signal. The buffer circuit includes a first receiving transistor that receives the input signal through its base terminal, a first clamp transistor having polarity the same as that of the first receiving transistor, of which the emitter terminal and the collector terminal are connected to corresponding terminals of the first receiving transistor and which receives a first clamp voltage restricting a signal level outputted from the buffer circuit through its base terminal, and a first current defining section that is commonly provided for the first receiving transistor and the first clamp transistor and defines a total amount of emitter currents flowing into the first receiving transistor and the first clamp transistor. The buffer circuit outputs an output signal according to an emitter voltage of the first receiving transistor. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009033726(A) 申请公布日期 2009.02.12
申请号 JP20080151021 申请日期 2008.06.09
申请人 ADVANTEST CORP 发明人 KIMURA HIROKI
分类号 H03G11/00;H03K5/007 主分类号 H03G11/00
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