AN EFFICIENT BUILT-IN SELF-TEST CIRCUIT AND ALGORITHM FOR NEIGHBORHOOD PATTERN AND BIT-LINE SENSITIVE FAULTS IN RANDOM ACCESS MEMORY

摘要

A built-in self-test circuit for detecting sensitive faults of a neighboring pattern and a neighboring bit line of a ram and a self-test method using the same are provided to test a parallel comparator and to detect bit line noise by using a sensitive fault detection algorithm for detecting a sensitive fault of a neighboring pattern in a RAM of a layout of a 4-cell neighboring structure. A test pattern generator(200) generates a 4-bit test pattern for a self test of a RAM. A column decoder(300) includes NMOS transistors to select and control a cell of a corresponding bit line 4 bit lines in a parallel manner. Each of the NMOS transistors is formed in 4 bit lines. A control circuit(600) controls a test for detecting faults of a neighboring pattern and a neighboring bit line in a cell selected from a decoder circuit by using the test pattern generated from the test pattern generator. An input/output buffer(900) performs reading/writing operations the data of the cell selected by the decoder circuit.