发明名称 ORO AND ORPRO WITH BIT LINE TRENCH TO SUPPRESS TRANSPORT PROGRAM DISTURB
摘要 Memory devices having improved TPD characteristics and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line openings containing a bit line dielectric between the memory cells. The memory cell contains a charge storage layer and a first poly gate. The bit line opening extends into the semiconductor substrate. By containing the bit line dielectric in the bit line openings that extend into the semiconductor substrate, the memory device can improve the electrical isolation between memory cells, thereby preventing and/or mitigating TPD.
申请公布号 US2009039405(A1) 申请公布日期 2009.02.12
申请号 US20070835542 申请日期 2007.08.08
申请人 SPANSION LLC 发明人 CHENG NING;CHANG K.T.;KINOSHITA HIRO;YANG CHIH-YUH;XUE LEI;LEE CHUNGHO;SHEN MINGHAO;HUI ANGELA;WU HUAQIANG
分类号 H01L29/76;H01L21/336 主分类号 H01L29/76
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