METHOD AND APPARATUS FOR DESIGNING AN INTEGRATED CIRCUIT
摘要
Method and apparatus for designing an integrated circuit by providing an IC layout design (220). Adding one or more assist features (60, 130) to the IC layout design. Identifying which of the one or more added assist features (60, 130) in the IC layout design will cause one or more defects (40) in the resultant wafer die manufactured from the IC layout design. Amending the one or more identified assist features (60, 130).
申请公布号
WO2008135810(A3)
申请公布日期
2009.02.12
申请号
WO2007IB52708
申请日期
2007.05.03
申请人
FREESCALE SEMICONDUCTOR, INC.;LUCAS, KEVIN;BOONE, ROBERT;GARDIN, CHRISTIAN