发明名称 Methods of forming electrical interconnect structures using polymer residues to increase etching selectivity through dielectric layers
摘要 Methods of forming electrical interconnect structures include forming a dielectric layer on a semiconductor substrate and forming a hard mask layer on the dielectric layer. A photoresist layer is patterned on an upper surface of the hard mask layer. This patterned photoresist layer is used as an etching mask during a step to selectively etch the hard mask layer and define an opening therein. This opening exposes the first dielectric layer. The patterned photoresist layer is then stripped from the hard mask layer using an ashing process that exposes the upper surface of the hard mask layer. Following this ashing process, a portion of the first dielectric layer extending opposite the opening is selectively etched using the hard mask layer as an etching mask. During this selective etching step, polymer residues are accumulated directly on the upper surface of the hard mask layer. These polymer residues may operate to increase a degree of selectively and inhibit recession of the hard mask layer during the step of selectively etching the first dielectric layer.
申请公布号 US7488687(B2) 申请公布日期 2009.02.10
申请号 US20060530952 申请日期 2006.09.12
申请人 SAMSUNG ELECTRONICS CO., LTD.;CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 PARK WAN JAE;KIM JAE HAK;CHEN TONG QING;LIN YI-HSIUNG
分类号 H01L21/00 主分类号 H01L21/00
代理机构 代理人
主权项
地址