| 摘要 |
A core voltage release driver is provided to control an amount of discharges in a core voltage release operation which is executed after the overdriving operation in normal and auto refresh modes. A release enable control unit(1) generates an enable signal(enable). A half core voltage generating unit(7) generates a half core voltage(Half_VCORE) by dividing a core voltage level. A comparison unit(5) compares a reference voltage with the half core voltage from the half core voltage generating unit. A core voltage discharging unit(3) stops a core voltage(VCORE) from being discharged when the half core voltage is lower than the reference voltage.
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