发明名称 A CHIP SCALE PACKAGE HAVING A IMPROVED RF CHARACTERISTICS AND MANUFACTURING METHOD THEREOF
摘要 <p>A chip scale package capable of improving radio frequency property by connecting bump and solder ball, and a manufacturing method thereof are provided to reduce manufacturing cost by using a substrate of a simple structure instead of a substrate having a through electrode. A substrate(310) is made of metal plate material surface-treated with insulating material, and uses an aluminum plate or a copper plate. A bump guide hole is formed on the substrate. A plating layer(314) is selectively formed in an edge of the bump guide hole. The plating layer is formed in a top, a side, and a bottom of the bump guide hole. A semiconductor chip(100) having a bump is mounted on a first surface of the substrate. A bump of the semiconductor chip is connected to the plating layer of the substrate by performing a first reflow process in the substrate mounting the semiconductor chip. A solder ball is attached in a second surface of the substrate. The bump and the solder ball are connected inside the bump guide hole of the substrate by performing a second reflow process about the substrate having the solder ball. Sealing material is charged in a space between the semiconductor chip and the substrate.</p>
申请公布号 KR100881024(B1) 申请公布日期 2009.02.05
申请号 KR20070080607 申请日期 2007.08.10
申请人 STS SEMICONDUCTOR & TELECOMMUNICATIONS CO., LTD. 发明人 JEONG, SANG JIN;CHUN, JUNG HWAN
分类号 H01L23/48 主分类号 H01L23/48
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