发明名称 |
Method for producing bit lines for UCP flash memories |
摘要 |
A semiconductor device can be fabricated by forming a floating gate layer over a semiconductor body. The floating gate layer is at least partially arranged over an insulation region in the semiconductor body. The floating gate layer is patterned to expose a portion of the insulation region. A recess is formed in a portion of the insulation region exposed by the patterned floating gate layer. A conductor is deposited within the recess. The conductor serves as a buried bitline. An insulator can then be formed within the recess over the conductor.
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申请公布号 |
US7485542(B2) |
申请公布日期 |
2009.02.03 |
申请号 |
US20050194059 |
申请日期 |
2005.07.29 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
GRATZ ACHIM;ROEHRICH MAYK;POLEI VERONIKA |
分类号 |
H01L21/76;H01L21/336;H01L21/8247;H01L27/115;H01L29/788 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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