Solid-state timing device using a floating-gate transistor

摘要

An aging device according to an embodiment of the present invention includes a semiconductor substrate (11), first and second diffusion layers (11A, 11B) provided in a first element region (AA1), a floating gate (14) provided above a channel region between the first and second diffusion layers (11A, 11B), and a control gate electrode (16) provided beside the floating gate (14) with an interval in the lateral direction. A coupling capacitance between the floating gate (14) and the control gate electrode (16) is larger than a coupling capacitance between the floating gate (14) and the semiconductor substrate (11).