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发明名称
具有突伸式连接堆叠之积体电路封装件系统
摘要
本发明系关于一种积体电路封装方法(900)，包括：提供与第二导线(304)相邻之第一导线(302)；在该第一导线(302)上方形成第一连接堆叠(312)，该第一连接堆叠(312)系突伸于该第二导线(304)上方；将积体电路装置(106)与该第一连接堆叠(312)相连；以及封装该积体电路装置(106)和该第一连接堆叠(312)。
申请公布号
TW200903679
申请公布日期
2009.01.16
申请号
TW097120147
申请日期
2008.05.30
申请人
史特斯晶片封装公司
发明人
杜拜泰;邹胜源
分类号
H01L21/60(2006.01);H01L21/50(2006.01)
主分类号
H01L21/60(2006.01)
代理机构
代理人
洪武雄;陈昭诚
主权项
地址
新加坡
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