| 摘要 |
A semiconductor memory device includes a reference current generating circuit configured to generate a bias signal in response to a precharge signal during a precharge operation. Each of a plurality of sense amplifier circuits is connected to a corresponding one of a plurality of bit lines. Each sense amplifier is configured to precharge a corresponding bit line in response to the bias signal. The reference current generating circuit is configured to maintain the bias signal at a level higher than a voltage of the bit lines, but lower than a supply voltage during a sensing operation.
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