发明名称 Rendering processor, rasterizer and rendering method
摘要 <p>A shader (20) sends a "completely full" signal to a buffer control unit (33) when a head pixel in a first pass input from a DDA (34) arrives at a final stage of a pipeline process. When the head pixel in the first pass arrives at a stage in the middle of the pipeline process, the shader (20) sends an "almost full" signal to the buffer control unit (33) and a primitive generating unit (90). Upon receiving the "almost full" signal, the primitive generating unit (90) suspends the generation of rendering primitives in the first pass and starts generating rendering primitives in the second pass. Upon receiving the "almost full" signal, the buffer control unit (33) supplies the rendering primitives in the first pass from the setup processing unit (32) to the DDA (34) via a temporary buffer (36). Upon receiving the "completely full" signal, the buffer control unit (33) switches to a second pass and directly supplies the rendering primitives in the second pass from the setup processing unit (32) to the DDA (34). </p>
申请公布号 EP1677257(A3) 申请公布日期 2009.01.14
申请号 EP20050027808 申请日期 2005.12.19
申请人 SONY COMPUTER ENTERTAINMENT INC. 发明人 NAOI, JUNICHI
分类号 G06T1/20;G06T15/00 主分类号 G06T1/20
代理机构 代理人
主权项
地址