发明名称 Phase-locked loop for stably adjusting frequency-band of voltage-controlled oscillator and phase locking method
摘要 A phase-locked loop (PLL) for stably adjusting a frequency band of a voltage-controlled oscillator and a phase locking method. In the PLL, a frequency band controller alters the frequency band selection digital value in response to an input clock signal and an oscillation control signal generated from an LPF of a basic PLL circuit, and thus a voltage-controlled oscillator of the basic PLL circuit alters the frequency of an output clock signal in response to the oscillation control signal and the frequency band selection digital value. The output clock signal is rapidly and stably phase-locked at a target frequency depending on the frequency band selection digital value.
申请公布号 US7471159(B2) 申请公布日期 2008.12.30
申请号 US20060595887 申请日期 2006.11.13
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 EUN LEE JUNG;DEOK SUH CHUN;TAE KIM HOON
分类号 H03L7/08;H03L7/095;H03L7/099;H03L7/10 主分类号 H03L7/08
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