发明名称 Low power/zero-offset charge pump circuits for DLLs and PLLs
摘要 A charge pump that generates a bias input to affect an output voltage of the charge pump is described herein. The charge pump may include a charge pump stage, a replica charge pump stage, and a self-biased differential amplifier. In some instances, the charge pump may be incorporated into a delay locked loop or a phase locked loop.
申请公布号 US7471157(B2) 申请公布日期 2008.12.30
申请号 US20060471756 申请日期 2006.06.20
申请人 INTEL CORPORATION 发明人 FAN YONGPING
分类号 H03L7/00 主分类号 H03L7/00
代理机构 代理人
主权项
地址