| 摘要 |
PURPOSE:To obtain a back-gate-type J-FET having few I/F noises by contacting a semiconductor layer, having an opposite conducting direction with respect to a channel region, on the surface of said channel region, and limiting the thickness of the channel by a depletion layer extending from said semiconductor layer. CONSTITUTION:A back-gate-type J-FET portion 10A and NPN bipolar transistor portion 10B are provided on a P-type Si substrate 10. An N<->-type layer 11 is epitaxially grown on all the surface of the P-type Si substrate 10 through N<+>-type embeded regions 12 and 13. The layer 11 is separated into island regions 11A and 11B including the regions 12 and 13, respectively, by a P<+>-type region 14. Then, P<+>-type source and drain regions 15 and 16 and an N<+>-type gate contact region 18 are diffused and formed in the region 11A. P<+>-type base region 17, an N<+>-type emitter region 19 which is located is said region 17, and N<+>-type collector contact region 20 are diffused and formed in said region 11B. Thereafter, a P-type channel region 21 is diffused and formed in said region 11A, all the surface of the substrate 10 is covered by an SiO2 film 22, a window is opened, and an N<+>-type polycrystalline layer 23 for forming a depletion region is deposited only on the region 21. |
