| 摘要 |
The shift register has a very low power consumption. Each cell of the shift register has two stages, each comprising an MOS structure (T1-T'1) which has two principal electrodes (Z00, Z1) respectively forming the input (Zoo) and the output (Z1) of the stage, and two control electrodes (k1, k'1) one of which (k1) can be connected to a bias source (P) and the other of which (k'1) is connected to the output electrode (Z1), and a capacitor (C1), one plate (Z1) of which is connected to the said output electrode (Z1) and the other plate (C1) of which receives one of two periodic signals phi 1(t) and phi 2(t) in phase opposition. The register is especially useful in a frequency divider circuit.
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