发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To realize a high speed, high integration MOSIC by a method wherein an oxidation resistant mask is placed on a substrate covered with a high concentration reverse conductivity type layer which is selectively oxidated to separate reverse conductivity type regions and the gate structure is built by removing channel region oxidated layer. CONSTITUTION:For example, an n type substrate 1 is overally diffused with a p<+> layer 2 and, for example, a nitride mask 3 is formed on FET source and drain regions and, if necessary, on a tunnel accommodated wiring region 7. Next, after forming an oxide layer 4 at a depth establishing some distance from the p<+> layer, and the part of the oxide layer 4 between source and drain regions 2a and 2b is selectively removed with help of a resist mask 9, for example, to form a depression 5. Next, a gate film 6 is formed on the depression 5 and, after providing contact holes in the nitride mask 3, an Al electrode for example is formed, completing an IC. By this, a high concentration structure can be formed on self-alignment manner and a high speed operation is ensured because gate parasitic capacitance can be reduced to the order of the p<+> layer 2 thickness and overlapping.
申请公布号 JPS5783064(A) 申请公布日期 1982.05.24
申请号 JP19810135525 申请日期 1981.08.31
申请人 HITACHI SEISAKUSHO KK 发明人 KAWAGOE HIROHITO
分类号 H01L29/417;H01L29/78 主分类号 H01L29/417
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