发明名称 PARALLEL-SERIAL CONVERSION CIRCUIT
摘要 PURPOSE:To execute the parallel-series conversion in high speed, by shifting two shift registers alternately and selecting the output of the two shift registers alternately. CONSTITUTION:An even number bit of parallel data (from 0 to 15) is taken as an input in parallel with the 1st shift register 1, an odd number bit is inputted in parallel with the 2nd shift register 2 at the same time, the 1st and 2nd shift registers 1, 2 are shifted alternately with shift clocks (b), (c), outputs (f), (g) of the 1st and 2nd shift registers 1, 2 are selected alternately with a data selector 4 based on the shift clocks (b), (c) of the frequency division circuit 3 to obtain a serial data (h). Thus, the inexpensive parallel-serial conversion circuit with high speed conversion is obtained.
申请公布号 JPS58146129(A) 申请公布日期 1983.08.31
申请号 JP19820028351 申请日期 1982.02.24
申请人 USAC DENSHI KOGYO KK 发明人 NAKAGAWA YOUICHI
分类号 H03M9/00 主分类号 H03M9/00
代理机构 代理人
主权项
地址