| 摘要 |
PURPOSE:To enable to reduce the capacitor area and thus contrive to increase the density of the device and to miniturize it by a method wherein a gate of an MISFET is formed into a double structure of a pair of said electrodes and a center electrode provided therebetween, and the side electrode is connected to a power source, and a normal gate signal is contrived to be inutted to the center electrode. CONSTITUTION:An N type source region 11 and a drain region 12 are for d on the surface of a P type semiconductor substrate 10. Then, a pair of the side electrodes 14 a part of which is overlapped on the source region 11 and the drain region 12 with an SiO2 film 13 as an insulation layer is formed of a polycrystalline Si. Further, a center electrode 16 insulated from the side electrodes 14 by an SiO2 film 15 is formed between these side electrodes 14 and 14, and the center of this center electrode 16 is contrived to be positioned on the same plane as the side electrodes 14 in direct contact with the SiO2 film 13. In case of using the MOS of this constitution for a switched capacitor circuit, the power source is connected to each side electrode 14, thus performing gate wiring so as to apply any one of signals phi1, phi1, phi2 and phi2 to the center electrode 16. |
