| 摘要 |
PURPOSE:To reduce glitch noise by connecting a load the same as the load of a positive signal output terminal of each switch circuit to a negative signal output terminal or connecting a pseudo load equivalent to the load of the positive signal output terminal to the negative signal output terminal so as to make input/ output characteristics of each switch circuit equal to each other. CONSTITUTION:An R-2R type resistance circuit network 1 connected to an output terminal AOUT is used as a collector load of a transistor (TR) to which a VREF is inputted in a differential pair TRs constituting a switch circuit 2 and an analog output signal in response to a binary parallel digital input signal is obtained. ON the other hand, a circuit network of the constitution entirely the same as that of the said R-2R type resistance circuit network is used as a collector load of a TR to which a digital signal is inputted in the differential pair TRs constituting the switch circuit 2, and the leading and trailing time are matched as the output characteristic at on/off operation in response to the digital input signal by making the collector load of both TRs of the differential pairs constituting the switch circuit 2 coincident completely. Thus, the difference of the input output characteristics is avoided. |
