发明名称 SEMICONDUCTOR MEMORY CELL
摘要 PURPOSE:To enable to integrate a semiconductor memory cell by connecting one of a pair of ohmic electrodes formed on double layer made of two types of semiconductors having different electron affinity to a bit line and the other to a word line. CONSTITUTION:After an electron storage layer 22, an electron supply layer 23 and an electrode contacting layer 24 are formed on a substrate 21, mesa etching is executed until reaching the substrate 21. The layers 22, 23 employ those having different electron affinity. A strip hole 25 is formed at the center region of the layer 24 to isolate a source electrode contacting layer 241 and a drain electrode contacting layer 242, and a source electrode and bit line 26 are formed. After an insulating layer 31 is further formed, a hole is opened at the layer 242, and a drain electrode and word line 27 is selectively formed. In this manner, one memory cell is formed by one member, thereby integrating the cell.
申请公布号 JPS59181051(A) 申请公布日期 1984.10.15
申请号 JP19830054213 申请日期 1983.03.30
申请人 FUJITSU KK 发明人 TSUNENOBU KAZUKIYO
分类号 G11C11/401;H01L21/8242;H01L27/10 主分类号 G11C11/401
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