发明名称 MOS SEMICONDUCTOR MEMORY
摘要 PURPOSE:To contrive to enhance reliability of a semiconductor memory chip by a method wherein MOS transistors are provided at the edges on one side of the word lines of the semiconductor memory chip to make word line metalization defective articles to reach complete inferiority according to burn-in to be rejected. CONSTITUTION:An MOS semiconductor memory chip contains an X decorder 21, a Y decorder and a data amplifier 22, word line patterns 23 formed according to Al metalization and connected to the X decorder 21 through word line drivers 25, bit line patterns 24 connected to the Y decorder and the data amplifier 22, and memory cells 26 provided at the intersecting points of the word line patterns 23 and the bit line patterns 24, and moreover contains MOS transistors 28 connected between the respective word line patterns 23 and earth electrodes 30. At the case to perform burn-in of the chip thereof, when electric potential of a high level is set up to a burn-in control terminal 29 to make the MOS transistors 28 to be in ON condition, a steady-state current flows in the selected word line 23, the steady-state current thereof applys stress according to the Al electromigration effect to the defect part of word line Al metalization, and the defect part is made to reach complete disconnection.
申请公布号 JPS59225559(A) 申请公布日期 1984.12.18
申请号 JP19830101171 申请日期 1983.06.07
申请人 NIPPON DENKI KK 发明人 NAKAMURA TOMOHARU
分类号 H01L21/822;H01L27/04;H01L27/10;H01L27/108;(IPC1-7):H01L27/10;G11C29/00;G11C11/34 主分类号 H01L21/822
代理机构 代理人
主权项
地址