发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To accelerate the speed of a C-MOS by forming a polycrystalline silicon layer of gate electrode in reverse conductive type to the conductive type of the opposed channel region, thereby performing an enhancement type MOS transistor. CONSTITUTION:A P type buried channel region 8, in which boron ions are implanted to the surface of an N type silicon substrate 6, is provided, while an N type buried channel region 9, in which arsenic ions are implanted to the surface of a P-well 7 is provided. Gate electrodes are respectively formed on both channel regions 8, 9 through a gate insulating film 3. A double layer formed of phosphorus-doped N type polycrystalline silicon layer 2 and a tungsten layer 10 are formed on the gate electrodes on the region 8. On the other hand, a gate electrode formed of a boron-doped P type polycrystalline silicon film 1 and a tungsten layer 10 is formed on the region 9. The source, and drain regions 4, 5 of both MOS transistors are formed.
申请公布号 JPS6032354(A) 申请公布日期 1985.02.19
申请号 JP19830141576 申请日期 1983.08.02
申请人 MATSUSHITA DENSHI KOGYO KK 发明人 UMEMOTO TOSHIAKI
分类号 H01L27/088;H01L21/8236;H01L27/092;H01L29/49;H01L29/78 主分类号 H01L27/088
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