| 摘要 |
PURPOSE:To contrive improvement in the characteristics of an element and the reliability of the titled semiconductor device by a method wherein only a sheet of mask is used and a highly accurate positioning of less than 1mum is dispensed with, thereby enabling to prevent the irregularity in parasitic capacitance due to positional deviation and the increase in contact resistance. CONSTITUTION:The surface of an insulation-isolated 33 N type Si substrate 31 is isolated by an oxide film 34, Si layers 35 and 36 are superposed, and after ions have been implanted into the substrate, an Si3N4 mask 37 is provided. A selective oxidation is performed on an Si layer 35, a P-layer 38 is formed at the same time, and the mask 37 is removed. A resist mask 39 is provided, ions are implanted, a part of the Si layer 35 is converted into a conductive layer 35-2 and, at the same time, a P-layer 40 is formed on a part of the P-layer 38. Then, a mask 41 is provided, an N-layer 43 is formed by performing an ion implantation, and after an alloying process has been performed on the surface of layers 35-1 and 35-2, a metal electrode 44 is attached. According to this constitution, a P-layer 40 and an N-layer 43 are positioned using a sheet of mask 37, a highly accurate mask matching is unnecessitated, and also as the P-layer 40 is connected by the conductive layer 35-2, an element can be connected in parallel easily, thereby enabling to obtain the highly reliable device. |
