发明名称 CLOCK SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To obtain the output of a high precision even in case of absence of a reference signal and to perform the response operation quickly by constituting a clock syncronizing circuit with a phase synchronizing circuit, a noise generator, and a synthesizer to which the output of the noise generator and the reference frequency signal are inputted and are connected as the reference signal input of the phase synchronizing circuit. CONSTITUTION:A reference signal A and the output of a noise generator 16 are inputted to a synthesizer 15, and the synthesized output is inputted to a phase synchronizing circuit 20. Thus, since only the signal having a certain determined band width out of the noise generated from the noise generator 16 is allowed to pass and is amplified even if the reference signal does not exist, the oscillated frequency of a voltage control oscillator 11 of the phase synchronizing circuit 20 is within a determined frequency range, and the output frequency precision is improved. Further, since the clock synchronizing operation of the phase synchronizing circuit 20 is performed within a prescribed frequency range, the clock synchronizing operation is performed quickly even for the quick change from absence of the reference signal to presence of this signal.
申请公布号 JPS6199416(A) 申请公布日期 1986.05.17
申请号 JP19840219849 申请日期 1984.10.19
申请人 NEC CORP 发明人 HARADA HIROSHI
分类号 H03L7/20;H03L7/14 主分类号 H03L7/20
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