| 摘要 |
PURPOSE:To remove the relative shift of delay time between the timing input side and the data input side by connecting an FF circuit for adding a delay time similar to the delay time of an FF circuit in an one-shot circuit to the data side to the data input side. CONSTITUTION:The one-shot circuit 4 generates a pulse having a specified width hin accordance with the leading edge of a differential pulse from a differential circuit 2. The pulse width divides the frequency of a clock pulse CK to obtain a specific time and the output time is applied from an AND circuit 38 to the data input D of a D-FF circuit 44. The pulse CK is applied to the timing input T of the circuit 44 and the delay time of the timing input to be applied to a D-FF circuit 6 becomes the delay time td of one circuit 44 as compared with the circuit 4 and is reduced by delay time 3td. A D-FF circuit 46 for offsetting the delay time td is connected to the data input D side of the circuit 6 and a data pulse DIN is applied to the data input D of the circuit 6 with the delay time td. |
