发明名称 METHOD AND APPARATUS FOR QUASI-ANALOG RECOMPOSITION OF ANALOG INPUT SIGNAL WITH FLUCTUATING AMPLITUDE AND FREQUENCY
摘要 <p>A quasi-analog reconstruction of an amplitude and frequency varying analog input signal is produced as a staircase waveform, each step voltage of which is generated by utilizing the binary bits of a corresponding codeword of a PCM signal derived from the analog input signal. …<??>In order to achieve optimum resolution, the binary bits of each PCM codeword are considered as C in number, of which an A number are major bits and a B number are minor bits; the A bits being converted to a (2<A>-1) number of discrete decimal bits, each of which controls the switching to and from a series voltage summation line (20) of a discrete voltage Vc …<CHEM>… where Vmax is substantially the peak voltage amplitude to be provided in the reconstructed signal. Individual ones of the B bits directly control the individual switching to and from the summation line of discrete voltages of unequal magnitudes declining in one-half voltage increments from Vc/2 to @@.…… </p>
申请公布号 JPS62147817(A) 申请公布日期 1987.07.01
申请号 JP19860199166 申请日期 1986.08.27
申请人 VARIAN ASSOC INC 发明人 JIYOOJI DABURIYUU UTSUDAADO
分类号 H03M1/14;G11B20/10;H03M1/00;H04B14/04 主分类号 H03M1/14
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