发明名称 REMAINDER GENERATION DEVICE
摘要 PURPOSE:To calculate a remainder at high speed by executing a high speed subtraction through the use of the Wilson-Leadree (W-L) division method and correcting a partial remainder obtained as a result. CONSTITUTION:A quotient and the partial remainder with respect to the quotient are obtained in a division means in units of plural bits and a termination means detects a first case when the quotient is obtained up to an integer part in the division means and a second case when the quotient is obtained up to a decimal part beyond the integer part and it terminates division. When the first case is detected in the termination means, a remainder correction means corrects oversubtraction in irreparable division with respect to the partial remainder. When the second case is detected, it corrects oversubtraction and corrects the remainder corresponding to the decimal part of the quotient, and obtains the remainder corresponding to the quotient to the integer part. Thus, the remainder of the objective number of bits can be obtained at high speed by the W-L division method.
申请公布号 JPH01193934(A) 申请公布日期 1989.08.03
申请号 JP19880018041 申请日期 1988.01.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAUCHI MIKAKO;UEDA KATSUHIKO
分类号 G06F7/52;G06F7/483;G06F7/535 主分类号 G06F7/52
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