发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To eliminate the need for a number of control signal lines by constructing a shift path with several partial shift pathes and providing a bypass function for the several partial shift pathes. CONSTITUTION:In a logic circuit 1 consisting of a single LSI, all the partial shift pathes composed of first partial shift pathes 10-1 to 10-n with the bypass function and second partial shift pathes 11-1 to 11-n without the bypass function are connected in series to form one shift path. The first partial shift pathes with the bypass function and the second shift pathes without the bypass function can be connected in the arbitrary order and plural number of each of them can be connected consecutively. A shift input signal line 101, a shift output signal line 102 and a shift clock signal line 103 are shared in shift operation. Thus, the number of signal lines required for constructing and controlling the shift path can be reduce.
申请公布号 JPH04141746(A) 申请公布日期 1992.05.15
申请号 JP19900265743 申请日期 1990.10.03
申请人 NEC CORP 发明人 UCHIBORI KATSUAKI
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
代理机构 代理人
主权项
地址