| 摘要 |
<p>PURPOSE:To make the acceleration of operational velocity and the high integration feasible in an ASIC provided with input output circuits and inner logic circuits as well as input/output circuits, inner logic circuits and clock amp. circuits. CONSTITUTION:Input/output circuits 2 and inner logic circuits 6 are respectively divided into multiple numbers in one direction so that the multiple numbers of the divided input/output circuits 2 may be arranged between respective multiple numbers of divided inner logic circuits 6. Furthermore, in an ASIC 1, clock amp. circuits 4 are divided into multiple numbers to be arranged from the central position to the peripheral positions and connected using the connecting wires in even length.</p> |
