| 摘要 |
Embodiments of spotlight synthetic aperture radar (SAR) systems and methods generating a SAR map in real time with minimum latency using a modified Polar Format Algorithm are generally described herein. Other embodiments may be described and claimed. In some embodiments, FPGA implemented down-range and cross-range resampling filters (104) (106) generate fully interpolated data (107) which may be FFT processed (110) as it is generated. In some embodiments, the down-range resample filter (104) and the cross-range resample filter (106) are output-based resampling filters that align a sinc function (402) with an output grid (404) and input coordinates define filter coefficients to modulate the input samples. In some embodiments, the down-range and cross-range resample filtering, coordinate generation, timing, address, and control, fully-interpolated data storage and the down-range FFT (110) may be implemented in a single FPGA (120). |
