| 摘要 |
PROBLEM TO BE SOLVED: To provide a DDS (Direct Digital Synthesizer) circuit with a counter which can stop the variation of an oscillation frequency in a DDS at an optional frequency. SOLUTION: The DDS 10 starts oscillation at a reference frequency on the basis of information supplied to an I/O port 11, and an oscillation frequency is successively varied at a fixed frequency interval thereafter. When starting an oscillation operation, the DDS 10 outputs a signal from an output terminal 12 and also outputs a clock synchronized with the varying operation of the oscillation frequency from a synchronization/clock terminal 13. The clock is counted in a counter IC20 and the count output is inputted to the PSO terminal 14 of the DDS 10. When the output signal of the counter IC20 is inputted to the PSO terminal 14, the DDS 10 stops the varying operation of the oscillation frequency, and outputs the signal of a fixed frequency from the output terminal 12. COPYRIGHT: (C)2009,JPO&INPIT
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