| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage device for surely adjusting a latch margin of an address signal. SOLUTION: The semiconductor storage device is equipped with: a command latch circuit 130 for latching a command signal CMD; an address latch circuit 140 for latching an address signal ADD; a mode latch circuit 150 for latching a mode signal MOD; and a command decoder 170 for selecting the address latch circuit 140 when a normal command is latched to the command latch circuit 130, and selecting the mode latch circuit 150 when an adjustment command is latched. Thus, the mode signal can be dynamically accepted without executing a mode register set. The input of a mode signal is prevented from being disabled, when the latch margin of the mode latch circuit is sufficiently secured. COPYRIGHT: (C)2009,JPO&INPIT |
