发明名称 MEMORY STRUCTURE AND OPERATING METHOD THEREOF
摘要 A memory structure including a substrate, a charge trapping layer, a block layer, a conducting layer and two doped regions is provided in the present invention. The charge trapping layer is disposed on the substrate. The block layer is disposed on the charge trapping layer. The conducting layer is disposed on the block layer. The doped regions are disposed respectively in the substrate on the two sides of the conducting layer.
申请公布号 US2008258204(A1) 申请公布日期 2008.10.23
申请号 US20070737961 申请日期 2007.04.20
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 WU CHAO-I
分类号 H01L29/792;G11C11/34 主分类号 H01L29/792
代理机构 代理人
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