发明名称 Chip package and package process thereof
摘要 A chip package and a package process thereof are provided. The chip package comprises a package substrate, a chip, a plurality of spacers, an adhesive layer, and a plurality of wires. The package substrate has a carrying surface. The chip is disposed on the carrying surface. The spacers are formed between the chip and the carrying surface to maintain an interval between the chip and the package substrate. The adhesive layer is disposed between the chip and carrying surface to encapsulate the spacers. The chip is electrically connected to the package substrate via the wires.
申请公布号 US7432127(B2) 申请公布日期 2008.10.07
申请号 US20060464296 申请日期 2006.08.14
申请人 ADVANCED SEMICONDUCTOR ENGINEERING INC. 发明人 LU YUNG-LI;WENG GWO-LIANG;YEH YING-TSAI
分类号 H01L21/00;H01L23/48;H01L23/52;H01L29/40 主分类号 H01L21/00
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