发明名称 APPARATUS AND METHOD FOR POST-PROCESSING DATA RATE CONTROL VALUE IN A HIGH RATE PACKET DATA SYSTEM
摘要 <p>An apparatus and method for post-processing a Data Rate Control (DRC) value in a high rate packet data system are provided, in which a loss of data throughput can be prevented by controlling the output of the DRC value. The apparatus for post-processing a DRC value, which is included in a mobile terminal having a DRC block for calculating a DRC value from a pilot channel signal received from a base station in a high rate packet data system, includes a DRC value comparison unit, a slot counter, and a DRC value determination unit. The DRC value comparison unit compares a current DRC value transmitted from the DRC block with a previous DRC value to determine if the current DRC value and the previous DRC value are equal to each other. The slot counter counts the number of slots, i.e., acquires a duration slot count, during which the current DRC value is maintained if the current DRC value is different from the previous DRC value. The DRC value determination unit determines the current DRC value as a final DRC value if the duration slot count reaches a predetermined slot threshold.</p>
申请公布号 KR100770893(B1) 申请公布日期 2007.10.26
申请号 KR20060111921 申请日期 2006.11.13
申请人 发明人
分类号 H04L12/56;H04L29/02;H04W28/04;H04W28/22 主分类号 H04L12/56
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