发明名称 CASCADED RADIX ARCHITECTURE FOR HIGH-SPEED VITERBI DECODER
摘要 A Viterbi decoder includes a branch metric unit for generating branch metrics between two states at two different time periods, a traceback unit, a traceback memory and an add-compare-select circuit. The add-compare-select circuit includes a plurality of cascaded add-compare-select sub-circuits, each add-compare-select sub-circuit calculating a path metric responsive to a plurality of branch metrics from the branch metric unit and a plurality of pre-calculated path metrics, where at least one of the add-compare-select sub-circuits receives a set of pre-calculated path metrics from another one of the add-compare-select sub-circuits.
申请公布号 US2007113161(A1) 申请公布日期 2007.05.17
申请号 US20060557208 申请日期 2006.11.07
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 LINGAM SRINIVAS;LEE SEOK-JUN;BATRA ANUJ;GOEL MANISH
分类号 H03M13/03 主分类号 H03M13/03
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