发明名称 |
Gate structure, semiconductor memory device having the gate structure and methods of fabricating the same |
摘要 |
A gate structure using nanodots as a trap site, a semiconductor device having the gate structure and methods of fabricating the same are provided. The gate structure may include a tunneling layer, a plurality of nanodots on the tunneling layer, and a control insulating layer including a high-k dielectric layer on the tunneling layer and the nanodots. A semiconductor memory device may further include a semiconductor substrate, the gate structure according to example embodiments on the semiconductor substrate and a first impurity region and a second impurity region in the semiconductor substrate, wherein the gate structure is in contact with the first and second impurity regions.
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申请公布号 |
US2007108505(A1) |
申请公布日期 |
2007.05.17 |
申请号 |
US20060594966 |
申请日期 |
2006.11.09 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SEOL KWANG-SOO;KIM BYUNG-KI;LEE EUN-KYUNG;MIN YO-SEP;CHO KYUNG-SANG;LEE JAE-HO;CHOI JAE-YOUNG |
分类号 |
H01L29/788;H01L29/792 |
主分类号 |
H01L29/788 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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