发明名称 |
COMPENSATED HIGH-SPEED PLL CIRCUIT |
摘要 |
The invention relates to a compensation method and phase-locked loop (PLL) circuit, wherein different kinds of two-point modulations are used and the integral regulator of a loop filter is replaced by introducing predetermined settings at the loop filter or at a voltage controlled oscillator. Thereby, the dynamic settling time of the PLL circuit can be improved to gain time for other circuit components which can thus assure required precision for the modulation. |
申请公布号 |
WO2006030335(A3) |
申请公布日期 |
2006.05.11 |
申请号 |
WO2005IB52840 |
申请日期 |
2005.08.30 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V.;PHILIPS INTELLECTUAL PROPERTY & STANDARDS GMBH;BIRTH, WINFRID |
发明人 |
BIRTH, WINFRID |
分类号 |
H03L7/083;H03L7/183;H03L7/197 |
主分类号 |
H03L7/083 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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