| 摘要 |
<P>PROBLEM TO BE SOLVED: To accelerate response to the change of voltage of a source/drain electrode. <P>SOLUTION: An LDMOS transistor is provided with a second conductive first well region (3) formed in a first conductive semiconductor substrate (2), a first conductive second well region (4) formed in the first well region, a second conductive third well region (5) formed in the second well region, a drain region (6) formed in the second well region, a source region (8) formed in the third well region, a gate electrode (10) formed on the third well region between the drain region and the source region through a gate insulating film and an insulating layer (11) formed between the gate electrode and the drain region. A parasitic capacity between the semiconductor substrate and the source region as well as a parasitic capacity between the semiconductor substrate and the drain region are series parasitic capacity respectively, which are seen so as to be small relatively whereby the delay of response to the change of voltage of the drain (source), which follows the change of voltage of the source (drain), becomes comparatively small. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
