| 摘要 |
<p>There is provided a processor capable of performing operation with a high operation frequency by reducing the delay generated between a memory and a register file. The processor (100) includes a register file (110) having a plurality of registers and a tag value generation circuit (102) for generating a tag value indicating the data attribute. Each of the registers has a data filed (112) for holding data and a tag field (111) for holding a tag value. When executing a load instruction for loading data into the register of the register file (110) from the memory (14), the tag generation circuit (102) generates a tag value according to the load instruction and stores it in the tag field (111).</p> |
