| 摘要 |
A method of arranging redundancy fuse block arrays may reduce test time for a memory device. The memory device may include a stack bank structure in which at least two banks share a row decoder or a column decoder. Redundancy fuse block arrays for the two banks may be alternately arranged in an X-axis direction or a Y-axis direction of a wafer. Accordingly, a tester may repair defective rows or columns of the two banks without shifting from one axis.
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