发明名称 Method for reducing wiring and required number of redundant elements
摘要 A method and enhanced Static Random Access Memory (SRAM) redundancy circuit reduce wiring and the required number of redundant elements. A bitline redundancy mechanism allows the swapping of a pair of bitlines for a redundant pair of bit columns. Two of the adjacent bitlines are swapped out at a time, one even and one odd. The swap is accomplished by steering the data around the bad columns and adding redundant columns on the end that are steered in when needed.
申请公布号 US7443744(B2) 申请公布日期 2008.10.28
申请号 US20060559431 申请日期 2006.11.14
申请人 发明人
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
主权项
地址