MEMORY SYSTEM AND MEMORY DEVICE TO IMPLEMENT CLOCK MIRROR SCHEME

摘要

A memory device implementing clock mirroring scheme and a memory system installed with the same are provided to reduce stub effect, by connecting signal lines transferred to clocks to ports of first and second memory chips adjacent to a penetration electrode of a board directly. A memory device supports a first and a second data input/output mode. The memory device comprises a first electrode pad, a second electrode pad, a clock signal line, a first switching part(510) and a second switching part(520). The clock signal line transfers a clock to an internal circuit of the memory device. The first switching part connects the first electrode pad and the clock signal line in response to a control signal, in case of the first data input/output mode. The second switching part connects the second electrode pad and the clock signal line in response to an inverted signal of the control signal, in case of the second data input/output mode.