发明名称 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor package that is small and of low profile, has high reliability and high flexibility of arrangement for electrodes, and to provide its manufacturing method. <P>SOLUTION: A via 4 is formed with respect to a substrate 2 of a semiconductor chip 1 so as to reach an electrode 3 from the rear side, and a conductive material 6 is embedded inside the via 4. One flat conductive plate is then placed on the rear side of the substrate 2 and is jointed to the rear-side electrode 6a. The conductive plate is then divided by etching to form a plurality of frames 7, each of which is connected to respective electrode 3 via each conductive material 6. Here, a mold resin 8 is then formed to encapsulate a semiconductor chip 1 and a frame 7. As a result, a protruding part 7a serves as an outer electrode, and a semiconductor package 11 is thus produced. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008160017(A) 申请公布日期 2008.07.10
申请号 JP20060349772 申请日期 2006.12.26
申请人 TOSHIBA CORP 发明人 MOCHIZUKI YOSHIO
分类号 H01L23/12 主分类号 H01L23/12
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