发明名称
摘要 An improved dual die package is disclosed. The dual die package includes a first lead frame connected to a first semiconductor chip and a second lead frame connected to a second semiconductor chip. The first leads and the second leads are electrically connected to one another using a wirebonding process rather than a thermocompression process thereby allowing conventional packaging equipment to be used when manufacturing a dual die package.
申请公布号 JP4195804(B2) 申请公布日期 2008.12.17
申请号 JP20020236998 申请日期 2002.08.15
申请人 发明人
分类号 H01L25/065;H01L25/18;H01L23/48;H01L23/495;H01L23/50;H01L25/07 主分类号 H01L25/065
代理机构 代理人
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