| 摘要 |
<p>A mask having a multiple overlay mark is provided to minimize the deformation of the overlay mark by performing the tungsten full-filling and the CMP process after forming the multiple contact hole by etching the insulating layer with the mask having the overlay mark of the multiple. A mask(200b) comprises a plurality of overlay marks(202b) which are formed to be located in the same gap with each other in the scribe line limiting the chip area on the wafer. The same design rule as the contact hole within the chip area is applied to the overlay mark. The pattern size of overlay mark is 0.22mum. A method for manufacturing the metal wiring using the mask having the overlay mark includes the step for forming the interlayer dielectric layer on the semiconductor substrate; the step for forming the multi contact hole by etching the interlayer dielectric layer; the step for polishing the gap-fill metal layer after filling the multi contact hole with the gap-fill metal layer.</p> |
